Tipster Digital Chat Station (translated from Chinese) shared details about the purported Dimensity 9500 SoC in a post on the Chinese social media platform Weibo. As per the tipster, who has a good track record when it comes to providing information about unannounced smartphones and chipsets, MediaTek's next-generation flagship mobile processor could have a new architecture comprising two prime cores and four performance cores.
It is speculated to be equipped with two Cortex-X930 prime cores dubbed “Travis” and six Cortex-A730 "Gelas" performance cores. The cores are said to have a 2+6 configuration, similar to Qualcomm's latest Snapdragon 8 Elite SoC, ditching the efficiency cores in the process.
The tipster further claims that Dimensity 9500 will be built using TSMC's N3P process (3nm), compared to the N3E process used for the fabrication of the current flagship Dimensity 9400 SoC. It is said to result in a performance boost of about 5 percent while also offering a 5-10 percent better efficiency.
The chipset is also tipped to use ARM's Scalable Matrix Extension (SME) — an Instruction Set Architecture (ISA) extension, which can accelerate AI and ML-based applications and provide enhanced for matrix operations. It may improve the Dimensity 9500 chip's multi-thread performance.
Shaurya Tomer is a Sub Editor at Gadgets 360 with 2 years of experience across a diverse spectrum of topics. With a particular focus on smartphones, gadgets and the ever-evolving landscape of artificial intelligence (AI), he often likes to explore the industry's intricacies and innovations – whether dissecting the latest smartphone release or exploring the ethical implications of AI advancements. In his free time, he often embarks on impromptu road trips to unwind, recharge, and ...More