Two years after AMD first unveiled the brand new Zen U architecture that would catapult it back into the high-performance PC and server U markets, the company has revealed details of the next-generation Zen 2 architecture that will succeed it. With a focus on Epyc chips for servers, AMD now hopes to sur the performance of its competitor Intel rather than just match it. New processors based on Zen 2 will use a 7nm manufacturing process and start hitting the market in 2019. Although exact dates and product specifications have not yet been revealed, AMD is hoping to achieve “double-digit growth” with this generation of products, according to CEO Lisa Su.
At an event in San Francisco titled Next Horizon, Su and other senior company executives and engineers laid out struggling with its own 10nm process.
Rome Us will have up to 64 cores using a new modular “chiplet” style of architecture rather than the Infinity Fabric interconnect to an on-package 14nm I/O die. AMD says this will greatly help with uniform memory access latency, which was potentially a bottleneck when data had to hop from one core complex to another. Rome will eight DDR4 memory channels and 128 lanes of PCIe 4.0 connectivity. Rome Us will also be socket-compatible with existing Naples server motherboards.

AMD claims a doubling of throughput and for processing 256-bit floating point instructions, as well as better branch prediction and much better power efficiency. Security is also improved, with full for data encryption as it es from U to memory. Performance gains in of instructions per clock will be improved as well. The company is also claiming a potential 45 percent reduction in total cost of ownership for an Epyc-based server rather than comparable Intel hardware.
7nm Rome Us are currently sampling to AMD's customers and clients. AMD also teased that Zen 3 is on track for 2020 and will use a refined 7nm manufacturing process while maintaining forward socket compatibility to help customers migrate. Zen 4 is also in development, but there is no further news on that yet. In a floating-point-intensive ray tracing demonstration of a single 64-core Rome U prototype running alongside a dual-socket Intel Xeon Platinum 8180M server, the new AMD chip was seen to beat its competitor.
AMD also announced that Cray also announced an Shasta supercomputer built around AMD Epyc Us, capable of running at 100 Petaflops.

Along with developments on the U side, AMD also showed off its first shipping 7nm GPUs, in the form of the new Radeon Instinct MI50 and MI60 accelerators for the datacentre market, aimed at machine learning, rendering, and cloud computing applications. They can be used for faster neural network training, thanks to the claimed ‘ultra-fast' floating point performance and second-gen 3D stacked HBM2 memory. The new accelerators will also high-speed PCIe 4.0 connectivity with twice the bandwidth of current PCIe 3.0 systems, as well as AMD's Infinity Fabric Link interconnect for up to 6x faster direct GPU-to-GPU communication.
The Radeon Instinct MI60 will feature 32GB of ECC HBM2 RAM with memory bandwidth of up to 1TBps. It will begin shipping to customers by the end of 2018. The Radeon Instinct MI50 will feature 16GB of ECC HBM2 and will become available late in Q1 2019. Both will half-precision, single-precision and double-precision floating point operations, with the MI60 offering up to 7.4 Teraflops of double-precision bandwidth. Both cards will also secure virtualisation allowing their resources to be shared between virtual machines.